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'''Memori akses acak statik''' ([[bahasa Inggris]]: '''Static Random Access Memory''', '''SRAM''') adalah sejenis memori [[semikonduktor]].
Kata "statik" menandakan bahwa memori memegang isinya selama listrik tetap berjalan, tidak seperti RAM dinamik ([[Dynamic Random Access Memory|DRAM]]) yang membutuhkan untuk "disegarkan" ("refreshed") secara periodik. Hal ini dikarenakan SRAM didesain menggunakan transistor tanpa kapasitor. Tidak adanya kapasitor membuat tidak ada daya yang bocor sehingga SRAM tidak membutuhkan refresh periodik. SRAM juga didesain menggunakan desain cluster enam transistor untuk menyimpan setiap bit informasi. Desain ini membuat SRAM lebih mahal tetapi juga lebih cepat jika dibandingkan dengan DRAM. Secara fisik chip, biaya pemanufakturan chip SRAM kira kira tiga puluh kali lebih besar dan lebih mahal daripada DRAM. Tetapi SRAM tidak boleh dibingungkan dengan [[memori baca-saja]] dan [[memori flash]], karena ia merupakan [[memori volatil]] dan memegang data hanya bila listrik terus diberikan.
Akses acak menandakan bahwa lokasi dalam memori dapat diakses, dibaca atau ditulis dalam waktu yang tetap tidak memperdulikan lokasi alamat data tersebut dalam memori.
Chip SRAM lazimnya digunakan sebagai chace memori, hal ini terutama karena kecepatannya. Saat ini SRAM dapat diperoleh dengan waktu akses dua nano detik atau kurang, kira-kira mampu mengimbangi kecepatan processor 500 MHz atau lebih.
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Each [[bit]] in an SRAM is stored on four [[transistor]]s that form two cross-coupled [[logical_not|inverter]]s. This storage cell has two stable states which are used to denote '''0''' and '''1'''. Two additional ''access'' transistors serve to control the access to a storage cell during read and write operations. It thus typically takes six [[MOSFET]]s to store one memory bit.
The symmetric circuit structure allows the value of a memory location to be read much faster than in a [[Dynamic Random Access Memory|DRAM]].
Another difference with DRAM that contributes to making SRAM faster is that commercial chips accept all address bits at a time. As opposed to this, commodity DRAMs have the address multiplexed in two halves, i.e. higher bits followed by lower bits, over the same package pins in order to keep their size and cost down.
SRAM should not be confused with [[SDRAM]], which stands for ''synchronous DRAM'' and is entirely different from SRAM, or with pseudostatic RAM (PSRAM), which is DRAM disguised as SRAM.
The size of an SRAM with ''m'' address lines and ''n'' data lines is <math>2^m</math> words, or <math>2^m \times n</math> bits.
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== Jenis SRAM ==
=== Berdasarkan jenis transistor ===
* bipolar (sekarang tidak banyak digunakan: mengonsumsi banyak listrik namun sangat cepat)
* [[CMOS]] (jenis paling umum)
=== Berdasarkan fungsi ===
* Asynchronous (independent of clock frequency, data-in and data out are controlled
by address transistion).
* Synchronous (all timings are initiated by the clock rise/fall time. Address, data-in
and other control signals are associated with the clock signals) .
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== Applications ==
Fast SRAM is faster than DRAM and is used where speed is the most important requirement, as in the [[CPU cache|cache]] of a [[Central processing unit|CPU]] and in [[digital signal processing]] [[circuit]]s. Slow, low-capacity SRAMs are used where low power consumption and low cost are the most important requirements, as in battery-powered backup RAM. SRAM is less dense than DRAM (fewer bits per unit area) and is therefore not suitable for high-capacity, low-cost applications such as [[Personal computer|PC]] [[extended memory]].
The [[Electric power|power]] consumption of SRAM varies widely depending on its speed. Fast SRAM is much more power-hungry than DRAM, and some [[integrated circuit|IC]]s can consume power of the order of a [[watt]] at full speed. Slow SRAM, such as the [[battery (electricity)|battery]]-powered "CMOS" RAM on PC motherboards, can have a very low power consumption, in the region of a microwatt.
== SRAM for hobbyists ==
Another current role for SRAM is that it is significantly easier to work with at the hobbyist level than [[DRAM]]. There is no need to deal with the refresh cycles of DRAM, and the address and signal pins are separate rather than multiplexed. Therefore the chip has a very straightforward pin-out: power, ground, some address pins, some data pins, and three control pins "write enable", "chip enable" and "output enable". "Chip enable" is for use in systems containing multiple SRAM chips; a [[demultiplexer]], such as a 74LS154, converts some upper bits of the address into a chip-enable for one of sixteen chips.
To write to the chip, the address is presented on the address pins and the desired data on the data pins, then the appropriate chip-enable is set, and then the write-enable. To read from it, the controller first presents the address, then the chip-enable, then the output-enable.
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